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Add linux/mips64el support
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
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builds/posix/prefix.linux_mips64el
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27
builds/posix/prefix.linux_mips64el
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@ -0,0 +1,27 @@
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# The contents of this file are subject to the Interbase Public
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# License Version 1.0 (the "License"); you may not use this file
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# except in compliance with the License. You may obtain a copy
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# of the License at http://www.Inprise.com/IPL.html
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#
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# Software distributed under the License is distributed on an
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# "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express
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# or implied. See the License for the specific language governing
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# rights and limitations under the License.
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#
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# The Original Code was created by Inprise Corporation
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# and its predecessors. Portions created by Inprise Corporation are
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# Copyright (C) Inprise Corporation.
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#
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# All Rights Reserved.
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# Contributor(s): ______________________________________.
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# Start of file prefix.linux: $(VERSION) $(PLATFORM)
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# 14 Apr 2008 Alan Barclay alan AT escribe.co.uk
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#LD=@CXX@
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#PROD_FLAGS=-ggdb -O3 -fno-omit-frame-pointer -DLINUX -pipe -MMD -fPIC
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#DEV_FLAGS=-ggdb -DLINUX -DDEBUG_GDS_ALLOC -pipe -MMD -p -fPIC -Werror=delete-incomplete -Wall -Wno-switch
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PROD_FLAGS=-O3 -DLINUX -DMIPS64EL -pipe -p -MMD -fPIC -fsigned-char -fmessage-length=0
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DEV_FLAGS=-ggdb -DLINUX -DMIPS64EL -pipe -p -MMD -fPIC -Werror=delete-incomplete -Wall -fsigned-char -fmessage-length=0 -Wno-non-virtual-dtor
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@ -230,6 +230,15 @@ dnl CPU_TYPE=ppc64
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SHRLIB_EXT=so
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SHRLIB_EXT=so
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;;
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;;
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mips64el-*-linux* | mips*64*el-*-linux*)
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MAKEFILE_PREFIX=linux_mips64el
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INSTALL_PREFIX=linux
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PLATFORM=LINUX
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AC_DEFINE(LINUX)
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EDITLINE_FLG=Y
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SHRLIB_EXT=so
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;;
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x86_64*-*-linux* | x86_64*-*-gnu*)
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x86_64*-*-linux* | x86_64*-*-gnu*)
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MAKEFILE_PREFIX=linux_amd64
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MAKEFILE_PREFIX=linux_amd64
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INSTALL_PREFIX=linux
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INSTALL_PREFIX=linux
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@ -50,6 +50,7 @@ static const UCHAR CpuArm64 = 15;
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static const UCHAR CpuPowerPc64el = 16;
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static const UCHAR CpuPowerPc64el = 16;
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static const UCHAR CpuM68k = 17;
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static const UCHAR CpuM68k = 17;
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static const UCHAR CpuRiscV64 = 18;
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static const UCHAR CpuRiscV64 = 18;
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static const UCHAR CpuMips64el = 19;
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static const UCHAR OsWindows = 0;
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static const UCHAR OsWindows = 0;
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static const UCHAR OsLinux = 1;
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static const UCHAR OsLinux = 1;
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@ -91,7 +92,8 @@ const char* hardware[] = {
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"ARM64",
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"ARM64",
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"PowerPC64el",
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"PowerPC64el",
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"M68k",
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"M68k",
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"RiscV64"
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"RiscV64",
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"MIPS64EL"
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};
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};
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const char* operatingSystem[] = {
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const char* operatingSystem[] = {
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@ -118,23 +120,23 @@ const char* compiler[] = {
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// This table lists pre-fb3 implementation codes
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// This table lists pre-fb3 implementation codes
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const UCHAR backwardTable[FB_NELEM(hardware) * FB_NELEM(operatingSystem)] =
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const UCHAR backwardTable[FB_NELEM(hardware) * FB_NELEM(operatingSystem)] =
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{
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{
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// Intel AMD Sparc PPC PPC64 MIPSEL MIPS ARM IA64 s390 s390x SH SHEB HPPA Alpha ARM64 PPC64el M68k RiscV64
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// Intel AMD Sparc PPC PPC64 MIPSEL MIPS ARM IA64 s390 s390x SH SHEB HPPA Alpha ARM64 PPC64el M68k RiscV64 MIPS64EL
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/* Windows */ 50, 68, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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/* Windows */ 50, 68, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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/* Linux */ 60, 66, 65, 69, 86, 71, 72, 75, 76, 79, 78, 80, 81, 82, 83, 84, 85, 87, 88,
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/* Linux */ 60, 66, 65, 69, 86, 71, 72, 75, 76, 79, 78, 80, 81, 82, 83, 84, 85, 87, 88, 90,
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/* Darwin */ 70, 73, 0, 63, 77, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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/* Darwin */ 70, 73, 0, 63, 77, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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/* Solaris */ 0, 0, 30, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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/* Solaris */ 0, 0, 30, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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/* HPUX */ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 31, 0, 0, 0, 0, 0,
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/* HPUX */ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 31, 0, 0, 0, 0, 0, 0,
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/* AIX */ 0, 0, 0, 35, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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/* AIX */ 0, 0, 0, 35, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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/* MVS */ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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/* MVS */ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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/* FreeBSD */ 61, 67, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 89, 0, 0,
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/* FreeBSD */ 61, 67, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 89, 0, 0, 0,
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/* NetBSD */ 62, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
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/* NetBSD */ 62, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
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};
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};
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const UCHAR backEndianess[FB_NELEM(hardware)] =
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const UCHAR backEndianess[FB_NELEM(hardware)] =
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{
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{
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// Intel AMD Sparc PPC PPC64 MIPSEL MIPS ARM IA64 s390 s390x SH SHEB HPPA Alpha ARM64 PPC64el M68k RiscV64
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// Intel AMD Sparc PPC PPC64 MIPSEL MIPS ARM IA64 s390 s390x SH SHEB HPPA Alpha ARM64 PPC64el M68k RiscV64 MIPS64EL
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0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 1, 0, 1, 1, 0, 0, 0, 1, 0,
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0, 0, 1, 1, 1, 0, 1, 0, 0, 1, 1, 0, 1, 1, 0, 0, 0, 1, 0, 0,
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};
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};
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} // anonymous namespace
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} // anonymous namespace
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@ -156,6 +156,10 @@
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#define FB_CPU CpuMips
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#define FB_CPU CpuMips
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#endif /* mips */
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#endif /* mips */
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#ifdef MIPS64EL
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#define FB_CPU CpuMips64el
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#endif /* mips64el */
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#ifdef IA64
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#ifdef IA64
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#define FB_CPU CpuIa64
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#define FB_CPU CpuIa64
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#define RISC_ALIGNMENT
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#define RISC_ALIGNMENT
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@ -300,6 +300,8 @@ enum info_db_implementations
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isc_info_db_impl_freebsd_ppc64el = 89,
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isc_info_db_impl_freebsd_ppc64el = 89,
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isc_info_db_impl_linux_mips64el = 90,
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isc_info_db_impl_last_value // Leave this LAST!
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isc_info_db_impl_last_value // Leave this LAST!
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};
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};
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