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split out ARM support for Android targets

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This commit is contained in:
Michael Mohr 2010-12-28 12:33:26 -08:00
parent 8ec8e78bc7
commit 7e63e06d1e
2 changed files with 63 additions and 6 deletions
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4
Android.mk
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@ -100,6 +100,10 @@ ifeq ($(TARGET_ARCH_ABI),armeabi-v7a)
# -ftree-vectorizer-verbose=2: verbose output during compile
# Note: not all V7a targets support NEON!
# LOCAL_ARM_NEON := true
LOCAL_CFLAGS += -DTFM_ARM_V7A
else ifeq ($(TARGET_ARCH_ABI),armeabi)
LOCAL_CFLAGS += -DTFM_ARM_V5TE
else
LOCAL_CFLAGS += -DTFM_ARM
endif

65
src/mont/fp_montgomery_reduce.c
View File

@ -296,9 +296,6 @@ asm( \
asm( \
" LDR r0,%1 \n\t" \
" ADDS r0,r0,%0 \n\t" \
#if defined(__thumb2__) \
" ITE CS \n\t" \
#endif \
" MOVCS %0,#1 \n\t" \
" MOVCC %0,#0 \n\t" \
" UMLAL r0,%0,%3,%4 \n\t" \
@ -310,9 +307,65 @@ asm( \
" LDR r0,%1 \n\t" \
" ADDS r0,r0,%0 \n\t" \
" STR r0,%1 \n\t" \
#if defined(__thumb2__) \
" ITE CS \n\t" \
#endif \
" MOVCS %0,#1 \n\t" \
" MOVCC %0,#0 \n\t" \
:"=r"(cy),"=g"(_c[0]):"0"(cy),"1"(_c[0]):"r0","%cc");
/******************************************************************/
#elif defined(TFM_ARM_V7A)
/* Android: armeabi-v7a target */
#define MONT_START
#define MONT_FINI
#define LOOP_END
#define LOOP_START \
mu = c[x] * mp
#define INNERMUL \
asm( \
" LDR r0,%1 \n\t" \
" ADDS r0,r0,%0 \n\t" \
" ITE CS \n\t" \
" MOVCS %0,#1 \n\t" \
" MOVCC %0,#0 \n\t" \
" UMLAL r0,%0,%3,%4 \n\t" \
" STR r0,%1 \n\t" \
:"=r"(cy),"=g"(_c[0]):"0"(cy),"r"(mu),"r"(*tmpm++),"1"(_c[0]):"r0","%cc");
#define PROPCARRY \
asm( \
" LDR r0,%1 \n\t" \
" ADDS r0,r0,%0 \n\t" \
" STR r0,%1 \n\t" \
" MOVCS %0,#1 \n\t" \
" MOVCC %0,#0 \n\t" \
:"=r"(cy),"=g"(_c[0]):"0"(cy),"1"(_c[0]):"r0","%cc");
/******************************************************************/
#elif defined(TFM_ARM_V5TE)
/* Android: armeabi target */
#define MONT_START
#define MONT_FINI
#define LOOP_END
#define LOOP_START \
mu = c[x] * mp
#define INNERMUL \
asm( \
" LDR r0,%1 \n\t" \
" ADDS r0,r0,%0 \n\t" \
" MOVCS %0,#1 \n\t" \
" MOVCC %0,#0 \n\t" \
" UMLAL r0,%0,%3,%4 \n\t" \
" STR r0,%1 \n\t" \
:"=r"(cy),"=g"(_c[0]):"0"(cy),"r"(mu),"r"(*tmpm++),"1"(_c[0]):"r0","%cc");
#define PROPCARRY \
asm( \
" LDR r0,%1 \n\t" \
" ADDS r0,r0,%0 \n\t" \
" STR r0,%1 \n\t" \
" MOVCS %0,#1 \n\t" \
" MOVCC %0,#0 \n\t" \
:"=r"(cy),"=g"(_c[0]):"0"(cy),"1"(_c[0]):"r0","%cc");